I. Field of the Invention
The invention generally relates to mobile communication devices such as smart phones and in particular to a dual-microprocessor architecture for use therein.
II. Description of the Related Art
A smart phone is a mobile communications device, such as a cellular telephone, configured to perform personal digital assistant (PDA) functions along with wireless telephony functions. Wireless telephony functions generally include the processing of wireless voice telephone calls, facsimile transmissions, data transmissions, paging messages, and the like. PDA functions generally include scheduling and calendaring functions, voice memo recording functions, phone book functions, alarm clock functions, hand-held game functions, voice recognition, handwriting recognition and the like. More sophisticated smart phones may also provide the ability for processing E-mail, browsing the Internet or download encoded video or music. Sophisticated smart phones may also provide the ability for determining location using a geosynchronous positioning system (GPS).
Various issues arise in designing an internal hardware architecture for a smart phone. The hardware must be capable of handling all of the necessary smart phone functions, while consuming relatively little power. The hardware component costs should be sufficiently inexpensive so that the overall costs of the smart phone remain competitive. Also, the hardware and software should be designed such that new products with new or enhanced functions can be quickly designed, tested and debugged and to be brought to market quickly.
For many years, dedicated microprocessors and peripheral components have been developed to perform wireless telephony functions. Other dedicated microprocessors and peripheral components have been developed to perform PDA functions. Since these systems have already been designed, tested and debugged, it is desirable at least initially to employ the existing microprocessors and peripheral components within the smart phone. Thus, rather than design, test and debug an entirely new microprocessor capable of handling both wireless telephony and PDA functions, it is preferable initially to design a system architecture which incorporates dual microprocessors. By incorporating dual microprocessors, the initial hardware and software design costs are kept low so that the cost of the smart phone remains competitive. Since the separate microprocessor systems have already been tested and debugged, only the resulting integrated system needs to be further tested and debugged and thus the smart phone can be brought to market fairly quickly.
However, at least some of the data processed by the smart phone must be accessible to both sets of microprocessors and peripheral components. For example, telephone numbers stored by the PDA system must be accessible to the wireless telephony system for use in initiating wireless telephone calls. For E-mail and Internet browser functions, data received by the wireless telephony system must be forwarded to the PDA subsystem for display by an E-mail software program, web browser, or the like. As another example, music or video downloaded from the Internet may need to be transferred from the wireless telephony system to the PDA system for proper playback. Depending upon the particular configuration of the overall system, numerous other types of data may need to be shared by both the wireless telephony system and the PDA system. Given that a significant amount of data must be shared, it is desirable to provide a shared memory system for use with the separate wireless telephony and PDA systems and it is to that end that aspects of the invention are directed.
To minimize power consumption, both microprocessors should be capable of being powered down, preferably independently of one another. Also, even while the microprocessors are in use, it may be preferable to operate the microprocessors using the different clock signals, having different clock frequencies. For example, the microprocessor of the PDA may be operated using a relatively slow clock signal whereas the wireless telephony microprocessor may need to be operated at a high clock frequency to properly process a real time wireless telephone call. Accordingly, it is desirable to configure the shared memory system so as to permit reliable access by either or both of the microprocessors to the shared memory system, regardless of the current clock rate of the microprocessors and regardless of whether one of the microprocessors is in a power shut-down mode. Still further problems arise in providing a shared memory system if both microprocessors, or if peripheral components associated therewith, require access to the shared memory simultaneously. Accordingly, it is desirable to provide a shared memory for use in a dual microprocessor system of a smart phone which resolves clocking issues and memory access contention issues and other aspects of the invention are directed to these ends.
Another issue that arises in designing a dual microprocessor system architecture for use within a smart phone is that some of the peripheral hardware components may be unnecessarily duplicated. For example, in connection with code division multiple access (CDMA) wireless telephony, a digital signal processor (DSP) is typically employed to perform vocoder functions. If the PDA is configured to respond to voice commands or is configured to recognize handwritten commands, the PDA may also require a DSP. Accordingly, it would be desirable to provide an improved dual microprocessor system architecture which eliminates the need to provide duplicative devices, such as DSP=s, and it is to that end that still other aspects of the invention are directed.
In accordance with a first aspect of the invention, a dual microprocessor system having a shared memory is provided for use in a mobile communications device. The system includes first and second microprocessors and a shared memory system accessible by both the microprocessors. By providing a shared memory system, data required by both microprocessors is conveniently shared thereby eliminating the need to provide duplicative memory subsystems and further eliminating the need to transfer data back and forth between duplicative memory subsystems. Hence, the overall size and power requirements of the dual microprocessor system are reduced and efficiency is increased. By retaining separate microprocessors, there is no need to design, test and debug an entirely new microprocessor capable of performing both wireless telephony functions and PDA functions.
In an exemplary embodiment, the mobile communication device is a smart phone. The first microprocessor is configured to perform wireless telephony functions. The second microprocessor is configured to perform PDA functions. The shared memory system includes a set of shared registers for storing commands, with each respective microprocessor communicating with the other microprocessor by storing commands within the shared registers for retrieval by the other microprocessor. By devoting a portion of the shared memory system to storing commands, the microprocessors are able to conveniently communicate with one another without requiring a bus system, or other communication system, directly interconnecting the two microprocessors. To minimize size and weight, and to also reduce power consumption and increase processing speed, the dual microprocessors, the shared memory and many of the peripheral components are formed within a single application specific integrated circuit (ASIC).
Also in the exemplary embodiment, the shared memory system includes first and second single-ported memory devices. The first microprocessor can read from both memory devices and write to the first device but cannot write to the second memory device. The second microprocessor can also read from both memory devices but writes only to the second device. A direct memory access (DMA) system is provided for interconnecting peripheral components of the first microprocessor with the shared memory system. A second DMA is provided for interconnecting the peripheral components of the second microprocessor with the shared memory. The first and second microprocessors are driven by first and second clock signals, of potentially differing clock rates. The shared memory system is driven by a clock signal set to the same clock rate as the higher clock rate of the microprocessors. The clock signal of the shared memory is within an independent clock regime from that of the clock signals of the first and second microprocessors such that shared memory can be accessed even if one or both of the first and second clock signals have been deactivated. An arbitration system is provided for arbitrating access to the shared memory system. The arbitration system grants priority to the microprocessor for controlling wireless telephony functions over the microprocessor for controlling PDA functions and grants priority to the DMA of the wireless telephony microprocessor over the DMA of the PDA microprocessor.
By configuring the system in accordance with the exemplary embodiment, memory contention issues are avoided, high-speed access to the memory is provided, and reliable operation of the shared memory is achieved despite independent clock rates and independent power shut down operations of either the first or second microprocessors.
In accordance with a second aspect of the invention, a dual microprocessor system having a shared DSP is provided for use in a mobile communications device. The system includes first and second microprocessors and a shared DSP accessible by both microprocessors. In an exemplary embodiment, the shared DSP includes shared program memory for storing firmware for controlling the functionality of the DSP. Each respective microprocessor determines whether the DSP is available and, if so, selectively stores firmware within the DSP for controlling the functions of the DSP. The firmware controls the DSP to perform vocoder functions, GPS location determination functions, voice recognition functions, handwriting recognition functions, and the like.
By providing a shared DSP, separate duplicative DSP devices need not be provided, yet both microprocessors can take advantage of the processing power of the DSP. Hence, size and power consumption is reduced and overall processing efficiency is increased.
The invention is also applicable to systems having two or more microprocessors. Additional objects, features and advantages of the invention are described below or will be apparent from the detailed description in combination with the accompanying drawings.